mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 869

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

16.11.7.11 SMCx TRANSPARENT TRANSMIT BUFFER DESCRIPTOR. Data is sent to
the communication processor module for transmission on an SMCx channel by arranging it
in buffers referenced by the channel’s transmit (TX) buffer descriptor table. Using the buffer
descriptors, the communication processor module confirms transmission or indicates error
conditions so that the processor knows the buffers have been serviced.
R—Ready
Bits 1, 5, 7–13, and 15—Reserved
These bits are reserved and must be set to 0.
W—Wrap (Final Buffer Descriptor in Table)
I—Interrupt
OFFSET + 0
OFFSET + 2
OFFSET + 4
OFFSET + 6
NOTE: You are only responsible for initializing the items in bold.
0 = The data buffer associated with this buffer descriptor is not ready for transmission
1 = The data buffer, which you prepare for transmission, is not transmitted yet or is
0 = This is not the last buffer descriptor in the TX buffer descriptor table.
1 = This is the last buffer descriptor in the TX buffer descriptor table. After this buffer is
0 = No interrupt is generated after this buffer is serviced.
1 = The TX and TXE bits in the SMCE–Transparent register are set when this buffer is
and you are free to manipulate it or its associated data buffer. The communication
processor module clears this bit after the buffer is transmitted or after an error
condition is encountered.
currently being transmitted. You cannot write any fields of this buffer descriptor
once this bit is set.
used, the communication processor module receives incoming data into the first
buffer descriptor that TBASE points to in the table. The number of TX buffer
descriptors in this table is programmable and determined by the W bit and overall
space constraints of the dual-port RAM.
serviced. TX and TXE can cause interrupts if they are enabled.
R
0
Note: The communication processor module sets all the status bits in this buffer
RES
1
W
descriptor, but you must clear them before submitting the buffer descriptor to the
communication processor module.
2
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For More Information On This Product,
3
I
MPC823 REFERENCE MANUAL
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L
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RES
5
TX DATA BUFFER POINTER
CM
6
DATA LENGTH
7
8
9
RESERVED
Communication Processor Module
10
11
12
13
UN
14
16-417
RES
15