mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 383

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
15.3.1.9 MEMORY PERIODIC TIMER PRESCALER REGISTER. The memory periodic
timer prescaler register (MPTPR) defines the divisor of the BRGCLK used as the memory
periodic timer input clock. Refer to Section 5.3.4 Internal Clock Signals for details.
PTP—Periodic Timers Prescaler
This field determines the division factor that is shown below.
Bits 8–15—Reserved
These bits are reserved and must be set to 0.
15.4 THE GENERAL-PURPOSE CHIP-SELECT MACHINE
The general-purpose chip-select machine (GPCM) allows a glueless and flexible interface
between the MPC823, SRAM, EPROM, FEPROM, ROM devices, and external peripherals.
The GPCM contains three basic register groups that you can use to configure it—base
registers 0–7, option registers 0–7, and the memory status register.
15.4.1 Configuration
If the MS field in the BRx of the selected bank selects the general-purpose chip-select
machine, the attributes for the memory cycle initiated are taken from the ORx. These
attributes include the CSNT, ACS, SCY, TRLX, EHTR, and SETA fields. See Table 15-2 for
signal behavior and system response.
MPTPR
RESET
FIELD
ADDR
R/W
BIT
001x xxxx =
0001 xxxx =
0000 1xxx = Divide by 8.
0000 01xx = Divide by 16.
0000 001x = Divide by 32.
0000 0001 = Divide by 64.
1xxx xxxx =
01xx xxxx =
0
1
Divide by 2.
Divide by 4.
Reserved.
Reserved.
2
Freescale Semiconductor, Inc.
For More Information On This Product,
00000001
3
PTP
R/W
MPC823 REFERENCE MANUAL
4
Go to: www.freescale.com
5
(IMMR & 0xFFFF0000) + 0x17A
6
7
8
9
10
RESERVED
00000000
11
R/W
12
Memory Controller
13
14
15-27
15

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