mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 878

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
OFFSET + 0
• C/I_RXBD—The SMCx circuit interface channel receive (RX) buffer descriptor is used
AR—Abort Request
This bit is only valid when a serial management controller uses the monitor channel
protocol and it is set by a serial management controller when an abort request is
received on the A bit. The SMCx transmitter transmits the EOM on the E bit after an
abort request is received.
Bits 3–7—Reserved
These bits are reserved and must be set to 0.
DATA—Data Field
This field contains the data to be transmitted by a serial management controller on the
monitor channel.
by the communication processor module to report information about the circuit interface
channel receive byte.
E—Empty
Bits 1–7 and 14–15—Reserved
These bits are reserved and must be set to 0.
C/I DATA—Command/Indication Data Bits
This field represents a 4-bit data field for circuit interface channel 0 and a 6-bit data field
for circuit interface channel 1. It contains the data received from the circuit interface
channel. For circuit interface channel 0, bits 10-13 contain the 4-bit data field and bits
8 and 9 are always written with zeros. For circuit interface channel 1, bits 8-13 contain
the 6-bit data field.
0 =
1 =
0
E
The communication processor module clears this bit to indicate that the data
byte associated with this buffer descriptor is now available to the core.
The core set this bit to indicate that the data byte associated with this buffer
descriptor has been read.
Note: Additional data received is discarded until the E bit is set.
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Freescale Semiconductor, Inc.
For More Information On This Product,
3
RES
MPC823 REFERENCE MANUAL
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Go to: www.freescale.com
5
6
7
8
9
10
C/I DATA
11
12
13
MOTOROLA
RESERVED
14
15