mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 67

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

IOIS16_B
SIGNAL
WAIT_B
ALE_B
VFLS0
VFLS1
DSCK
IP_B0
IP_B1
IP_B2
IP_B3
IP_B4
LWP0
IP_B5
LWP1
TEXP
IWP0
IWP1
IWP2
AT1
AT2
VF2
VF0
VF1
PIN NUMBER
D5
C4
B8
A8
C8
D7
A9
B9
C9
Table 2-1. Signal Descriptions (Continued)
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Timer Expired —This output signal reflects the status of the TEXPS bit of the
PLPRCR register in the clock interface.
Wait Slot B —This input signal, if asserted low, causes the completion of a
transaction to be delayed on the PCMCIA-controlled Slot B.
Address Latch Enable B —This output signal is asserted when the MPC823
initiates an access to a region under the control of the PCMCIA socket B interface.
Development Serial Clock —This input signal is the clock for the debug port
interface.
Address Type 1 —This bidirectional three-state signal is driven by the MPC823
when it initiates a transaction on the external bus. When the transaction is initiated
by the internal core, it indicates if the transfer is for problem or privilege state.
Input Port B 0 —This input signal is sensed by the MPC823 and its value and
changes are reported in the PIPR and PSCR registers of the PCMCIA interface.
Instruction Watchpoint 0 —This output signal reports the detection of an instruction
watchpoint in the program flow executed by the internal core.
Visible History Buffer Flushes Status —This output signal is output by the
MPC823 when you need program instructions flow tracking. It reports the number of
instructions flushed from the history buffer in the internal core.
Input Port B 1 —This input signal is sensed by the MPC823 and its value and
changes are reported in the PIPR and PSCR registers of the PCMCIA interface.
Instruction Watchpoint 1 —This output signal reports the detection of an instruction
watchpoint in the program flow executed by the internal core.
Visible History Buffer Flushes Status —This output signal is output by the
MPC823 when you need program instructions flow tracking. It reports the number of
instructions flushed from the history buffer in the internal core.
Input Port B 2—This input signal is sensed by the MPC823 and its value and
changes are reported in the PIPR and PSCR registers of the PCMCIA interface.
I/O Device B is 16 Bits Port Size—This input signal is monitored by the MPC823
when a PCMCIA interface transaction is initiated to an I/O region in socket B within
the PCMCIA space.
Address Type 2 —This bidirectional three-state signal is driven by the MPC823
when it initiates a transaction on the external bus. When the transaction is initiated
by the internal core, it indicates if the transfer is instruction or data.
Input Port B 3—This input signal is monitored by the MPC823 and its value and
changes are reported in the PIPR and PSCR registers of the PCMCIA interface.
Instruction Watchpoint 2—This output signal reports the detection of an instruction
watchpoint in the program flow executed by the internal core.
Visible Instruction Queue Flush Status—This output signal, together with VF0 and
VF1, is output by the MPC823 when you need program instruction flow tracking. VFx
reports the number of instructions flushed from the instruction queue in the internal
core.
Input Port B 4—This input signal is monitored by the MPC823 and its value and
changes are reported in the PIPR and PSCR registers of the PCMCIA interface.
Load/Store Watchpoint 0—This output signal reports the detection of a data
watchpoint in the program flow executed by the internal core.
Visible Instruction Queue Flushes Status—This output signal, together with VF1
and VF2, is output by the MPC823 when you need program instructions flow
tracking. VF reports the number of instructions flushed from the instruction queue in
the internal core.
Input Port B 5—This input signal is monitored by the MPC823 and its value and
changes are reported in the PIPR and PSCR registers of the PCMCIA interface.
Load/Store Watchpoint 1—This output signal reports the detection of a data
watchpoint in the program flow executed by the internal core.
Visible Instruction Queue Flushes Status—This output signal, together with VF0
and VF2, is output by the MPC823 when you need program instructions flow
tracking. VF reports the number of instructions flushed from the instruction queue in
the internal core.
MPC823 REFERENCE MANUAL
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DESCRIPTION
External Signals
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