mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 928

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Communication Processor Module
Table 16-41 contains the default description of all port A pin options.
If a port A pin is selected as a general-purpose I/O pin, it can be accessed through the port
A data register (PADAT). Data written to the PADAT is stored in an output latch. If a port A
pin is configured as an output, the output latch data is gated onto the port pin. When PADAT
is read, the port pin itself is read. If a port A pin is configured as an input, data written to
PADAT is still stored in the output latch, but is prevented from reaching the port pin. In this
case, when PADAT is read, the state of the port pin is read. If an input to a peripheral is not
supplied from a pin, then a default value is supplied to the on-chip peripheral as listed in
Table 16-41.
NOTE: The items in bold have open-drain capability.
SIGNAL
PA15
PA14
PA13
PA12
PA9
PA8
PA7
PA6
PA5
PA4
The I/O direction for the TDM and SMC2 pins are reversed. See PA8 and PA9.
TIN3 and TIN4 are not present in mask base #F98S.
PAPAR = 0
PORT A15
PORT A14
PORT A13
PORT A12
PORT A9
PORT A8
PORT A7
PORT A6
PORT A5
PORT A4
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 16-41. Port A Pin Assignment
CLK1/TIN1/L1RCLKA
CLK3/TIN2/L1TCLKA
MPC823 REFERENCE MANUAL
TIN3/CLK2
TIN4/CLK4
PADIR = 0
USBRXD
SMRXD2
SMTXD2
USBOE
RXD2
TXD2
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PAPAR = 1
PIN FUNCTION
PADIR = 1
L1TXDA
L1RXDA
BRGO1
BRGO2
TOUT1
TOUT2
CLK1/TIN1/L1RCLKA = BRGO1
CLK3/TIN2/L1TCLKA = BRGO2
TIN3/CLK2 = GND
TIN4/CLK4 = GND
PERIPHERALS
Undefined
GND
GND
GND
MOTOROLA

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