mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 373

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

15.3.1.4 MEMORY COMMAND REGISTER. The memory command register (MCR)
allows you to issue commands to stimulate UPM routine execution. This capability enables
the CPU to perform special memory operations in addition to the standard read/write and
periodic timer service operations.
OP—Command Opcode
This field defines the operation to be executed by the user-programmable machine that is
specified in the UM field.
Bits 2–7—Reserved
These bits are reserved and must be set to 0.
UM—User Machine
This bit selects the user-programmable machine for this command.
Bits 9–15—Reserved
These bits are reserved and must be set to 0.
MCR
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
00 = Writes the contents of the memory data register into the RAM location indexed by
01 = Reads the contents of the RAM location indexed by the MAD field and stores it in
10 = Executes the RAM word in the RAM array that services one of the eight memory
11 = Reserved.
0 = UPMA.
1 = UPMB.
the MAD field. (WRITE command)
the memory data register. (READ command)
banks specified in the MB field. The executed RAM word is referenced by the
MAD field. If the executed RAM word has the LAST bit set, it will be the last RAM
word executed. (RUN command)
16
0
R/W
OP
0
R/W
MB
17
1
0
18
2
Freescale Semiconductor, Inc.
RES
R/W
For More Information On This Product,
19
3
0
RESERVED
20
MPC823 REFERENCE MANUAL
4
R/W
0
Go to: www.freescale.com
21
5
MCLF
R/W
(IMMR & 0xFFFF0000) + 0x16A
(IMMR & 0xFFFF0000) + 0x168
0
22
6
23
7
RESERVED
R/W
UM
24
8
0
R/W
0
25
9
10
26
11
27
RESERVED
R/W
12
28
0
MAD
R/W
Memory Controller
0
13
29
14
30
15-17
15
31