mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 703

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

16.9.16.13 SCCx HDLC STATUS REGISTER.When a serial communication controller is
in HDLC mode, the 8-bit read-only SCCx status register is referred to as the SCCx HDLC
status register (SCCS–HDLC). Since each protocol has specific requirements, the SCCS
bits are different for each implementation. This register allows you to monitor real-time
status conditions on the RXDx pin. The real-time status of the CTSx and CDx pins are part
of the port C parallel I/O.
Bits 0–4—Reserved
These bits are reserved and must be set to 0.
FG—Flags
When this bit is cleared, the most recently received eight bits are examined every bit time to
see if a flag is present. FG is set as soon as an HDLC flag (0x7E) is received on the line and
once it is set, it remains set at least eight bit times and the next eight received bits are
examined. If another flag occurs, this bit stays set for at least another eight bits. Otherwise,
it is cleared and the search begins again. The line is checked after the data has been
decoded by the DPLL.
CS—Carrier Sense (DPLL)
This bit shows the real-time carrier sense of the line as determined by the DPLL.
ID—Idle Status
This bit is set when the RXDx pin is a logic one for 15 or more consecutive bit times. It is
cleared after a single logic zero is received.
SCCS–HDLC
RESET
FIELD
ADDR
R/W
BIT
0 = HDLC flags are not being received.
1 = HDLC flags are being received.
0 = The DPLL does not sense a carrier.
1 = The DPLL senses a carrier.
0 = The RXDx pin is busy.
1 = The RXDx pin is idle.
0
Freescale Semiconductor, Inc.
1
For More Information On This Product,
RESERVED
MPC823 REFERENCE MANUAL
R
2
0
Go to: www.freescale.com
(IMMR & 0xFFFF0000) + 0xA37
3
4
Communication Processor Module
RO
FG
5
0
CS
R
6
0
ID
16-251
R
7
0