mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1271

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MPC823 Instruction Set—rlwinm
rlwinm
Assembler Syntax
Definition
Operation
Description
Description
FIELD
FIELD
BIT
BIT
16
0
17
1
SH
18
2
Freescale Semiconductor, Inc.
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For More Information On This Product,
19
3
rlwinm.
r
m
rA
by operand SH. A mask is generated having 1 bits from bit MB
through bit ME and 0 bits elsewhere. The rotated data is ANDed
with the generated mask and the result is placed into rA.
using the methods shown below:
rlwinm
Rotate Left Word Immediate then AND with Mask
n
The contents of rS are rotated left the number of bits specified
rlwinm can be used to extract, rotate, shift, and clear bit fields
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ROTL(rS,
MPC823 REFERENCE MANUAL
4
SH
MASK(MB, ME)
r & m
To extract an n field, that starts at bit position b in rS,
right-justified into rA (clearing the remaining 32 – n bits
of rA), set SH = b + n, MB = 32 – n, and ME = 31.
To extract an n field, that starts at bit position b in rS, left-
justified into rA (clearing the remaining 32 – n bits
of rA), set SH = b, MB = 0, and ME = n – 1.
To rotate the contents of a register left (or right) by n bits,
set SH = n (32 – n), MB = 0, and ME = 31.
To shift the contents of a register right by n bits, by setting
SH = 32 – n, MB = n, and ME = 31. It can be used to clear
the high-order b bits of a register and then shift the result
left by n bits by setting SH = n, MB = b – n and
ME = 31 – n.
To clear the low-order n bits of a register, by setting
SH = 0, MB = 0, and ME = 31 – n.
Go to: www.freescale.com
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5
rA,rS,SH,MB,ME (Rc = 0)
rA,rS,SH,MB,ME (Rc = 1)
22
6
n
)
MB
23
7
24
S
8
25
9
10
26
11
27
ME
12
28
13
29
A
MOTOROLA
14
30
RC
15
31

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