mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 744

no-image

mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Communication Processor Module
DCR—IrDA DPLL Clock Ratio
This field determines the clock ratio between the IrDA DPLL clock and the bit rate clock. This
field is valid only in high-speed mode.
FD—Full Duplex
LOOP—Loop Mode
When set, this bit selects the local loopback operation. The transmitter output is internally
connected to the receiver input. The receiver and transmitter operate normally, except the
received data is ignored.
MOD—Infrared Mode
Mode of operation.
EN—Enable IrDA
This bit enables IrDA decoder/encoder operation.
00 = 12x bit rate clock.
01 = Reserved.
1x = Reserved.
0 = Data reception is disabled during the transmission process.
1 = Transmission and reception of data in parallel are enabled.
0 = Normal operation.
1 = The IrDA is in loopback mode.
00 = Low-speed mode (up to and including 115.2kb/s).
01 = Middle-speed (0.576Mb/s or 1.152Mb/s).
10 = High-speed (4.0Mb/s).
11 = Reserved.
0 = IrDA is disabled.
1 = IrDA is enabled.
Note: The FD bit must be set in loopback mode.
Note: Changing the EN bit value is allowed only when the SCC2 is off (after the ENR
and ENT bits in the GSMR_L are cleared).
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
MOTOROLA

Related parts for mpc823rg