mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 118

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
The frequency for the GCLKx system clock is:
The frequency for the GCLKx_50 system clock is:
CLKOUT is derived from GCLK2_50. It defaults to VCOOUT, which is the user-defined
system frequency (25-75MHz). CLKOUT can drive at full-strength, half-strength, or it can be
disabled. The strength of the drive is controlled in the system clock and reset control
register. Disabling or decreasing the strength of CLKOUT reduces power consumption,
noise, and electromagnetic interference on the printed circuit board. When the SPLL is
acquiring lock, the CLKOUT signal is disabled and remains in a low state.
5.3.4.2 THE BAUD RATE GENERATOR CLOCK. The baud rate generator clock
(BRGCLK) is used by the four baud rate generators of the communication processor module
and by the memory controller refresh counter. It defaults to VCOOUT, which is the
user-defined system frequency (25-75MHz). The baud rate generator clock allows the baud
rate generators to continue operating at a fixed frequency, even when the rest of the
MPC823 is operating at a reduced frequency. Refer to Section 16.8 The Baud Rate
Generators for more information about using the baud rate generator clock to save power.
GCLKx_50
GCLKx
freq
freq
=
VCOOUT
=
--------------------------------------------------------------
2
--------------------------------------------------------------
DFNH
2
GCLK1
DFNH
VCOOUT
VCOOUT
or 2
or 2
DFBRG
DFNL 1
freq
DFNL 1
Freescale Semiconductor, Inc.
freq
For More Information On This Product,
+
+
EBDF
Figure 5-11. BRGCLK Divider
Figure 5-10. CLKOUT Divider
MPC823 REFERENCE MANUAL
---------------------------
EBDF 1
Go to: www.freescale.com
1
PHASE
+
GCLK2_50
BRGCLK
CLKOUT
Clocks and Power Control
(REFRESH
CPM, UPM,
TIMER)
5-19

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