mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 295

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor, Inc.
System Interface Unit
12.9 THE SOFTWARE WATCHDOG TIMER
The system interface unit provides the software watchdog timer (SWT) option that prevents
system lockout when the software gets trapped in loops without a controlled exit. The
software watchdog timer is enabled after system reset to automatically generate a system
reset if it times out. If you do not need the software watchdog timer, you must clear the SWE
bit in the system protection control register (SYPCR) to disable it. If it is used, the software
watchdog timer requires a special service sequence to be executed on a periodic basis. If
this periodic servicing action does not occur, the software watchdog timer times out and
issues a reset or a nonmaskable interrupt, which is programmed in the SWRI bit of the
SYPCR. Once the SYPCR register is written by the software, the state of the SWE bit cannot
be changed. Refer to Section 12.12.1 System Configuration and Protection Registers
for more information. To service the software watchdog timer, write 0x556C and 0xAA39 to
the software service register.
This sequence clears the watchdog timer and the timing process begins again. If any value
other than 0x556C or 0xAA39 is written to the software service register (SWSR), the entire
sequence must start over. Although the writes must occur in the correct order before a
timeout occurs, any number of instructions may be executed between the writes. This allows
interrupts and exceptions to occur between the two writes when necessary. Refer to
Figure 12-6 for more information.
RESET
0X556C / DON’T_RELOAD
STATE 0
STATE 1
WAITING FOR 0X556C
WAITING FOR 0XAA39
0XAA39 / RELOAD
NOT 0X556C / DON’T_RELOAD
NOT 0XAA39 / DON’T_RELOAD
Figure 12-6. Software Watchdog Timer Service State Diagram
Although most software disciplines permit or encourage the watchdog concept, some
systems require a selection of timeout periods. For this reason, the software watchdog timer
must provide a selectable range for the timeout period. Figure 12-7 illustrates the present
method for handling this requirement. Figure 12-7 also shows the range that the value in the
SWTC field determines. This value is then loaded into a 16-bit decrementer clocked by the
system clock. When necessary, an additional divide by 2,048 prescaler is used.
MPC823 REFERENCE MANUAL
MOTOROLA
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