mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 809

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
The V bit is set if the SOF token was received error-free.
• RBASE and TBASE—The receive and transmit buffer descriptor base address entries
define the starting point in the dual-port RAM for the set of buffer descriptors to receive
and transmit data. This provides a great deal of flexibility in partitioning the buffer
descriptors for the USB controller. By setting the W bit in the last buffer descriptor in
each list, you can select how many buffer descriptors to allocate for the transmit and
receive side of the USB controller. However, you must initialize these entries before
enabling the USB controller. Furthermore, you must not configure buffer descriptor
tables of the USB to overlap any other serial channel’s buffer descriptors or erratic
operation will occur.
NOTE: You are only responsible for initializing the items in bold. Also, Base = (EP x PTR).
ADDRESS
Base + 00
Base + 02
Base + 04
Base + 05
Base + 06
Base + 08
Base + 0a
Base + 0c
Base + 10
Base + 14
Base + 16
Base + 18
Note: RBASE and TBASE must contain a value that is divisible by eight.
Freescale Semiconductor, Inc.
Table 16-35. Endpoint Parameters Block
For More Information On This Product,
TSTATE
MRBLR
RBASE
TBASE
RBPTR
TBPTR
TBCNT
NAME
RFCR
TCRC
TFCR
TPTR
RES
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
Half Word
Half Word
Half Word
Half Word
Half Word
Half Word
Half Word
WIDTH
8 Bytes
Word
Word
Byte
Byte
RX Buffer Descriptor Base Address
Tx Buffer Descriptor Base Address
Maximum Receive Buffer Length
RX Buffer Descriptor Pointer
TX Buffer Descriptor Pointer
TX Internal Data Pointer
TX Internal Byte Count
Communication Processor Module
RX Function Code
TX Function Code
TX Internal State
DESCRIPTION
TX Temp CRC
Reserved
16-357

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