mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 378

no-image

mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Memory Controller
TLFA—Timer Loop Field A
This field specifies the number of times a loop defined in the UPMA RAM word is executed
for a periodic timer service.
15.3.1.6 MACHINE B MODE REGISTER. The machine B mode register (MBMR) contains
the configuration for the user-programmable B machine. See Figure 15-1 (page 15-3) for
more information.
MBMR
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
0001 = The loop is executed 1 time.
0010 = The loop is executed 2 times.
0011 = The loop is executed 3 times.
0100 = The loop is executed 4 times.
0101 = The loop is executed 5 times.
0110 = The loop is executed 6 times.
0111 = The loop is executed 7 times.
1000 = The loop is executed 8 times.
1001 = The loop is executed 9 times.
1010 = The loop is executed 10 times.
1011 = The loop is executed 11 times.
1100 = The loop is executed 12 times.
1101 = The loop is executed 13 times.
1110 = The loop is executed 14 times.
1111 = The loop is executed 15 times.
0000 = The loop is executed 16 times.
16
0
Note: The UPM refresh is done in a round robin manner. If more than one chip-select
G0CLB
R/W
17
1
0
18
uses the same UPM, the refreshes will progress through each one. For example,
if you have three chip-selects using UPMA, you would need to set the periodic
timer A period to one-third the normal refresh.
2
Freescale Semiconductor, Inc.
GPLB4
For More Information On This Product,
R/W
19
DIS
3
1
PTB
R/W
0
20
MPC823 REFERENCE MANUAL
4
Go to: www.freescale.com
21
5
RLFB
R/W
0
22
6
(IMMR & 0xFFFF0000) + 0x174
(IMMR & 0xFFFF0000) + 0x176
23
7
PTBE
R/W
24
8
0
25
9
WLFB
R/W
0
AMB
R/W
10
26
0
11
27
RES
R/W
12
28
0
13
29
TLFB
DSB
R/W
R/W
MOTOROLA
0
0
14
30
RES
R/W
15
31
0

Related parts for mpc823rg