mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 668

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Communication Processor Module
SYN—Synchronous Mode
DRT—Disable Receiver While Transmitting
Bit 10—Reserved
This bit is reserved and must be set to 0.
PEN—Parity Enable
RPM—Receiver Parity Mode
This field selects the type of parity check that the receiver will perform. It can be modified
on-the-fly.
When odd parity is selected, the transmitter counts the number of ones in the data word. If
the total number of ones is not an odd number, the parity bit is set to 1 and produces an odd
number. If the receiver counts an even number of ones, an error in transmission has
occurred. In the same manner, for even parity, an even number must result from the
calculation performed at both ends of the line. In high or low parity (also called mark or space
parity), if the parity bit is not high or low, a parity error is reported.
0 = Normal asynchronous operation. Normally, you program the TENC and RENC
1 = Synchronous SCCx UART controller using 1 clock. Normally, you program the
0 = Normal operation.
1 = While the SCCx UART controller is transmitting data, the receiver is disabled. This
0 = No parity.
1 = Parity is enabled and determined by the RPM and TPM bits.
00 = Odd parity.
01 = Low parity. Always check for a zero in the parity bit position.
10 = Even parity.
11 = High parity. Always check for a one in the parity bit position.
fields in the GSMR_L to NRZ and select either 8 , 16 , or 32 in the RDCR and
TDCR fields of the GSMR_L. 16 is the recommended value for most applications.
TENC and RENC fields in the GSMR_L to NRZ and set the RDCR and TDCR fields
in the GSMR_L to 1 mode. A 1 bit is transferred with each clock and is
synchronous to the clock. As with the other modes, the clock can be provided
internally or externally. This mode is sometimes referred to as isochronous UART
channel operation.
is useful if the SCCx UART controller is configured onto a multidrop line and you
do not want to receive your transmission.
Note: You must set the P bit in the transmit buffer descriptor if you are using the
MPC823 in multidrop UART mode.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
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