mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 305

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

System Interface Unit
SWF—Software Watchdog Freeze
SWE—Software Watchdog Enable
This bit enables the software watchdog timer. To disable the software watchdog timer, it
must be cleared by the software after a system reset.
SWRI—Software Watchdog Reset/Interrupt Select
SWP—Software Watchdog Prescale
12.12.1.4 TRANSFER ERROR STATUS REGISTER. The transfer error status register
(TESR) contains a bit for each exception source generated by a transfer error. A bit set to
logic 1 indicates what type of transfer error exception occurred since the last time the bits
were cleared. The bits are cleared by reset or by writing a 1 to the appropriate bit. Canceled
speculative accesses that do not cause an interrupt may set these bits. The register has two
identical sets of fields–one is associated with instruction transfers and the other with data
transfers.
Bits 0–17 and 24–25—Reserved
These bits are reserved and must be set to 0.
TESR
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
0 = The software watchdog timer continues counting even if the FRZ signal is
1 = The software watchdog timer stops counting when the FRZ signal is asserted.
0 = The software watchdog timer causes a nonmaskable interrupt to the core.
1 = The software watchdog timer causes a system reset (default).
0 = The software watchdog timer is not prescaled.
1 = The software watchdog timer is prescaled by a factor of 2,048.
asserted.
RESERVED
16
0
R
0
17
1
IEXT
18
R
2
0
Freescale Semiconductor, Inc.
ITMT
For More Information On This Product,
19
R
3
0
IPB0
20
MPC823 REFERENCE MANUAL
R
4
0
Go to: www.freescale.com
IPB1
21
R
5
0
(IMMR & 0xFFFF0000) + 0x020
(IMMR & 0xFFFF0000) + 0x022
IPB2
22
R
6
0
IPB3
RESERVED
23
R
7
0
R
0
RESERVED
24
8
R
0
25
9
DEXT DTMT DPB0 DPB1 DPB2 DPB3
10
26
R
0
11
27
R
0
12
28
R
0
13
29
R
0
MOTOROLA
14
30
R
0
15
31
R
0