mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 942

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
16.14.9.3 PORT C PIN ASSIGNMENT REGISTER. The port C pin assignment register
(PCPAR) is a 16-bit register that is cleared by system reset.
Bits 0–3—Reserved
These bits are reserved and must be set to 0.
DD4–DD15—Dedicated Function Pins 4-15
16.14.9.4 PORT C SPECIAL OPTIONS REGISTER. The port C special options (PCSO)
register indicates whether certain port C pins can connect to on-chip peripherals and
generate an interrupt at the same time. Each bit defined in the PCSO corresponds to a port
C line (PC8–PC11 and PC14–PC15). The PCSO is cleared by reset.
Bits 0–5 and 12–13—Reserved
These bits are reserved and must be set to 0.
CDx—Carrier Detect 2 and 3
PCPAR
PCSO
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
0 = General-purpose I/O. The peripheral functions of the pin are not used.
1 = Dedicated peripheral function. The pin is used by the internal module. The on-chip
0 = PCx is a general-purpose interrupt I/O pin. The SCCx internal CDx signal is always
1 = PCx is connected to the corresponding SCCx signal input in addition to being a
peripheral function to which it is dedicated can be determined by other bits such as
those in the PBDIR.
asserted. If PCDIR configures this pin as an input, the pin can generate an interrupt
to the core, as controlled by the PCINT bits.
general-purpose interrupt pin.
R/W
0
0
0
RESERVED
R/W
1
0
1
R/W
2
0
2
RESERVED
R/W
Freescale Semiconductor, Inc.
0
R/W
For More Information On This Product,
3
0
3
DD4
R/W
MPC823 REFERENCE MANUAL
4
0
4
Go to: www.freescale.com
DD5
R/W
5
0
5
(IMMR & 0xFFFF0000) + 0x962
DD6
R/W
CD3
R/W
6
0
6
0
(IMMR & 0xFFFF0000) + 0x964
DD7
R/W
CTS3
R/W
7
0
7
0
DD8
R/W
CD2
R/W
8
0
8
0
DD9 DD10 DD11 DD12 DD13 DD14 DD15
R/W
CTS2
R/W
9
9
0
0
R/W
USB
RXN
R/W
10
10
0
0
R/W
USB
RXP
R/W
11
11
0
0
R/W
12
12
0
RESERVED
R/W
0
R/W
13
13
0
MOTOROLA
DREQ1 DREQ2
R/W
R/W
14
14
0
0
R/W
R/W
15
15
0
0