mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1290

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
stswi
Assembler Syntax
Definition
Operation
Description
FIELD
FIELD
BIT
BIT
16
0
17
1
NB
18
2
Freescale Semiconductor, Inc.
31
For More Information On This Product,
19
3
else EA
if NB = 0 then
else
r
i
do while
if i = 32 then r
MEM(EA, 1)
i
if i = 64 then i
EA
n
number of bytes to store. Let nr = CEIL( n
of registers to supply data. n consecutive bytes starting at EA are
stored from GPRs rS through rS + nr – 1. Bytes are stored left to
right from each register. The sequence of registers wraps
around through r0 if required. Under certain conditions (like
segment boundary crossing), the data alignment exception
handler may be invoked. In some implementations, this
instruction is likely to have a greater latency and take longer to
execute than a sequence of individual load or store instructions
that produce the same results.
stswi
Store String Word Immediate
if rA = 0 then EA
EA is (rA|0). Let n = NB if NB
POWERPC ARCHITECTURE
20
32
i + 8
rS – 1
MPC823 REFERENCE MANUAL
n
4
n
– 1
EA + 1
Go to: www.freescale.com
n
21
NB
5
> 0
LEVEL
(rA)
UISA
rS,rA,NB
22
n
6
GPR(r)[i–i + 7]
32
r + 1 (mod 32)
32
23
7
0
24
S
8
25
9
SUPERVISOR
725
0, n = 32 if NB = 0; n is the
10
26
MPC823 Instruction Set—stswi
11
27
4); nr is the number
OPTIONAL
12
28
13
29
A
14
30
FORM
X
B-137
15
31
0

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