mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 535

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Each SDMA channel can be programmed to output one of eight function codes that identify
the channel currently accessing memory. The SDMA channel can be assigned a big-endian
(Motorola) or little-endian format for accessing buffer data. These features are programmed
in the receive and transmit function code registers that are associated with the serial
communication controllers, serial management controllers, serial peripheral interface, and
I
communication processor module generates a unique interrupt in the RISC status register.
The interrupt service routine reads the SDMA address register to determine the address that
the bus error occurred on. The channel that caused the bus error can be found by reading
the receive and transmit internal data pointers from the specific protocol parameters area in
the parameter RAM of the serial channels. If an SDMA bus error occurs on a RISC-related
cycle, all CPM activity ceases and the entire communication processor module must be
reset in the CPM command register (CPCR).
2
C controller. If a bus error occurs when the SDMA conducts a RISC-related access, the
MICROCONTROLLER
RISC
INTERNAL U-BUS
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 16-36. SDMA Data Paths
SDMA
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
2
DUAL-PORT
RAM
1
INTERFACE
SYSTEM
UNIT
Communication Processor Module
EXTERNAL
RAM
EXTERNAL
ROM
16-83

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