mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 906

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
16.13.1 Features
The following is a list of the I
16.13.2 I
Both serial data (SDA) and serial clock (SCL) are bidirectional pins that must be connected
to a positive 5V power supply via an external pull-up resistor in the 6.8K Ohm to 10K Ohm
range. Both pins are high when the I
and clocks out transmitted data on the SDA pin.
The I
I
the I
its input from BRGCLK, which is described in Section 5.3.4.2 The Baud Rate Generator
Clock . When configured as a slave, the I
An I
as the SDA signal making a high-to-low transition while SCL is high. An acknowledge (ACK)
is generated by the I
driving the SDA signal low during the SCL clock pulse immediately following each data byte
transmission. The data and ACK signals are always sampled on the rising edge of SCL. If
the receiver does not issue an ACK after a data byte is transmitted, the I
a stop condition and transmission stops. A stop condition is when the SDA signal makes a
low to high transition while the SCL signal remains high, as illustrated in Figure 16-125.
2
C controller generates SCL, and then initiates and terminates the I/O operation. In addition,
• Two-Pin Interface
• Full-Duplex Operation
• Master or Slave I
• MultiMaster Environment Support
• Continuous Transfer Mode for Autoscanning Peripherals
• Supports Maximum Capacitive Load of 400
• Independent Programmable Baud Rate Generator
• Supports I
• Supports 7-Bit I
• Open-Drain Output Pins Support MultiMaster Configuration
• Local Loopback Capability for Testing
2
2
C transaction is initiated when the master generates a start condition, which is defined
2
C controller generates the SCL signal via a dedicated baud rate generator that takes
C controller can be configured as a master or slave. When configured as a master, the
2
C Controller Clocking and Pin Functions
2
C Low- and High-Speed Operation
2
2
C Addressing
C receiver after each byte transfer. The receiver signals an ACK by
2
C Mode Support
Freescale Semiconductor, Inc.
For More Information On This Product,
2
C controller’s main features:
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
2
C bus is free. The SCL signal clocks in received data
2
C controller receives SCL as an input.
P
F on Both Bus Lines (Fully I
2
C master generates
2
C-Compliant)
MOTOROLA