mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 639

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
If the CTSx pin is not already asserted when the RTSx pin is asserted, then the delays to
the first bit of data depend on when CTSx is asserted. Figure 16-65 illustrates that the delay
between CTSx and the data can be approximately 0.5- to 1-bit time or 0-bit times, depending
on how the CTSS bit is set in the GSMR_H.
(OUTPUT)
(OUTPUT)
(OUTPUT)
(OUTPUT)
(INPUT)
(INPUT)
CTSx
TCLK
RTSx
TCLK
TXDx
RTSx
CTSx
TXDx
Figure 16-65. CTSx Output Delays Asserted for Synchronous Protocols
Freescale Semiconductor, Inc.
For More Information On This Product,
FIRST BIT OF FRAME DATA
CTS SAMPLED LOW HERE
FIRST BIT OF FRAME DATA
MPC823 REFERENCE MANUAL
NOTE: CTSS is set to 0 in the GSMR. CTSP is a "don't care".
NOTE: CTSS is set to 1 in the GSMR. CTSP is a "don't care".
Go to: www.freescale.com
LAST BIT OF FRAME DATA
LAST BIT OF FRAME DATA
Communication Processor Module
16-187

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