mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 687

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
16.9.16.5 PROGRAMMING THE SCCS IN HDLC MODE.The core configures the serial
communication controllers to operate in one of the protocols set in the MODE field of the
GSMR_L. The SCCx HDLC controller uses the same data structure as other modes and it
supports multibuffer operation and address comparisons. The reception errors are reported
through the RX buffer descriptor and the transmit errors are reported through the TX buffer
descriptor.
• TMP—A temporary register that is only used by the communication processor module.
• TMP_MB—A temporary register that is only used by the communication processor
FLAG
0x7E
module.
RECOGNIZES ONE 16-BIT ADDRESS (HADDR1) AND
THE 16-BIT BROADCAST ADDRESS (HADDR2)
ADDRESS
HADDR1
HADDR2
HADDR3
HADDR4
HMASK
0x68
Note: For 8-bit addresses, the eight high-order bits in HMASK must be masked out
16-BIT ADDRESS RECOGNITION
Figure 16-77. HDLC Address Recognition Example
(cleared). The eight low-order bits of HMASK and HADDRx must contain the
address byte that immediately follows the opening flag. For, example, to
recognize a frame that begins 0x7E, 0x68, 0xAA, using 16-bit address
recognition, HADDRx must contain 0xAA68 and HMASK must contain 0xFFFF.
Refer to Figure 16-77 for details.
ADDRESS
Freescale Semiconductor, Inc.
0xAA
For More Information On This Product,
0xFFFF
0xAA68
0xFFFF
0xAA68
0xAA68
MPC823 REFERENCE MANUAL
CONTROL
0x44
Go to: www.freescale.com
ETC.
FLAG
0x7E
RECOGNIZES A SINGLE 8-BIT ADDRESS (HADDR1)
HADDR2
HADDR3
HADDR4
HADDR1
HMASK
Communication Processor Module
8-BIT ADDRESS RECOGNITION
ADDRESS
0x55
0xXX55
0xXX55
0xXX55
0xXX55
0x00FF
CONTROL
0x44
ETC.
16-235

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