mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 182

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Instruction Execution Timing
8.2 INSTRUCTION EXECUTION TIMING EXAMPLES
All examples assume an instruction cache hit.
8.2.1 Data Cache Load
lwz
sub
addic r4,r14,1
mulli r5,r3,3
addi r4,3(r0)
This is an example from a data cache with zero wait states. The sub instruction is dependent
on the value loaded by the load to r12. This causes a bubble to occur in the instruction
stream as shown in the execute line. Refer to Section 8.2.2.2 Private Writeback Bus Load
for instances in which no such dependency exists.
FETCH
DECODE
READ + EXECUTE
WRITEBACK
L ADDRESS DRIVE
L DATA
LOAD WRITE BACK
r12,64 (SP)
r3,r12,3
LWZ
Figure 8-1. Example of a Data Cache Load
Freescale Semiconductor, Inc.
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LWZ
SUB
MPC823 REFERENCE MANUAL
LWZ
Go to: www.freescale.com
LD
ADDIC
BUBBLE
LD
SUB
LD
MULLI
SUB
ADDIC
ADDI
SUB
ADDIC
ADD
MOTOROLA