mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 808

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Communication Processor Module
You must initialize certain parameter RAM values before the USB controller is enabled.
Other values are initialized by the communication processor module. Once initialized, the
parameter RAM values do not need to be accessed by your software. They must only be
modified when there is no USB activity.
EP
FRAME_N
RESET
RESET
• EPxPTR—The endpoint parameters block pointers are index pointers to the endpoint’s
FIELD
ADDR
• FRAME_N—The frame number entry is updated by the USB controller when a SOF
FIELD
ADDR
x
R/W
R/W
PTR
BIT
BIT
parameter block. The parameter block can be allocated to any address divisible by 32
in the dual-port RAM. The format of the endpoint parameter block is shown in
Table 16-35.
token is received. The entry contains 11 bits representing the frame number. An SOF
interrupt is issued when this entry is updated. You must initialize this parameter to zero
before operating the USB controller.
R/W
0
0
V
0
1
1
RESERVED
2
2
USB BASE + 0x00 (EP0PTR), 0x02 (EP1PTR), 0x04 (EP2PTR), 0x06 (EP3PTR)
R/W
Freescale Semiconductor, Inc.
0
For More Information On This Product,
3
3
ENDPOINT INDEX POINTER
MPC823 REFERENCE MANUAL
4
4
Go to: www.freescale.com
R/W
5
0
5
6
6
USB BASE + 0x10
7
7
8
8
FRAME NUMBER
9
9
R/W
10
10
0
R/W
11
11
0
0
R/W
12
12
0
0
R/W
13
13
0
0
MOTOROLA
R/W
14
14
0
0
R/W
15
15
0
0

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