mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 130

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

OPERATION
Normal High
LPM=00
TEXPS=1
Normal Low
LPM=00
TEXPS=1
Doze High
LPM=01
TEXPS=1
Doze Low
LPM=01
TEXPS=1
Sleep LPM=10
TEXPS=1
Deep-Sleep
LPM=11
TEXPS=1
Power-Down
LPM=11
TEXPS=0
NOTE: The above currents are measured at 3.3V.
When a timer expires, if enabled, the TEXP pin is asserted asynchronously with CLKOUT
to show that the MPC823 is preparing to exit power-down mode. TEXP must be externally
connected to a switch that must turn on the power supply to the chip, as illustrated in
Figure 5-16.
In normal and doze modes, the system can be in the high mode defined by the DFNH field
or in the low mode defined by the DFNL field. The MPC823 is in normal high mode after
reset and this also the default state when the condition to exit low-power mode occurs.
Table 5-7 provides the power consumption equations for each of these modes
MODE
20 mW + (.78)/2
20mW + 0.4(.78)/2
20 mW + (.78)/2
F98S UDR2 (.42µ)
20 mW + 0.4(.78)/
Note: The communication processor module has its own power conservation logic,
EQUATION
2
(DFNL+1)
—
—
—
which it uses to automatically shut down its own clock when idle.
(DFNL+1)
W
DFNH
DFNH
Freescale Semiconductor, Inc.
Table 5-7. MPC823 Low-Power Modes
For More Information On This Product,
W
W
W
POWER @
50MHZ
450 mW
356 mW
188 mW
MPC823 REFERENCE MANUAL
860mW
UDR2
10 mW
(.42µ)
F98S
40µA
10µA
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20 mW + 0.4(.555)/2
20 mW + 0.4(.555)/2
20 mW + (.555)/2
20 mW + (.555)/2
H89G CDR2 (.36µ)
EQUATION
—
—
—
(DFNL+1)
DFNH
(DFNL+1)
DFNH
W
W
W
W
POWER @
25MHZ
298 mW
159 mW
132 mW
76 mW
10 mW
CDR2
(.36µ)
H89G
40µA
10µA
Clocks and Power Control
POWER @
50MHZ
575 mW
298 mW
242 mW
131 mW
10 mW
CDR2
H89G
(.36µ)
40µA
10µA
POWER @
750 mW
385 mW
312 mW
166 mW
66MHZ
CDR2
10 mW
H89G
(.36µ)
40µA
10µA
5-31