mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 741

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
The link layer frame generally consists of the address, control, data and CRC32 fields. The
IrDA transmitter decodes the packet bits into 4PPM format. The 4PPM encoding will be
described later. The receiver is responsible to decode the incoming data frame into the
regular bit format and to deliver it to the software. The receiver continues to receive and
interpret data until the stop flag (STO) is recognized. A stop flag indicates the end of frame.
The stop flag consists of exactly one transmission of the following stream of symbols.
The physical layer defines the electrical parameters of the signals between the
encoder/decoder module and the IR transducer module. All frame envelope
patterns—PA, STA, and STO—are transmitted as is. The link layer frame bits are encoded
before transmission. Each two bits encoded into four chips according to the 4PPM scheme.
(A)
0000
(B)
1100
Figure 16-100. High-Speed IrDA Data Format
Freescale Semiconductor, Inc.
Figure 16-99. Stop Flag Symbol Format
For More Information On This Product,
0
0000
MPC823 REFERENCE MANUAL
0
Go to: www.freescale.com
1100
0
1/4 BIT TIME
DATA BITS
1
0000
1
1100
Communication Processor Module
0
0000
1
1
1100
16-289

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