mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 465

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
16.2.6.2.1 CPM Command Register Example. To perform a complete reset of the
communication processor module, you must write 0x8001 to the CPCR, which also sets the
RST and FLG bits. After you issue this command, the CPCR returns a value of 0x0000 after
two clocks. To execute an ENTER HUNT MODE command to the SCC2, write 0x0341 to
the CPCR. While this command is executing, the CPCR returns a 0x0341 value and once it
is finished it returns a 0x0340 value, which clears the FLG bit.
16.2.6.3 DUAL-PORT RAM. The communication processor module has 8,192 bytes of
static RAM that is configured as dual-port memory. Revision 0 of the MPC823 silicon has a
5K dual-port RAM. A block diagram of the dual-port RAM is illustrated in Figure 16-4.
NOTE: The shaded area is implemented on the silicon.
• GCI TIMEOUT—The GCI timeout command causes the MPC823 transmitter to send
• USB—The USB commands have the same opcode. See Section 16.10 Universal
RISC INSTRUCTION ADDRESS
an abort request on the E bit of the GCI bus.
Serial Bus Controller for a more detailed description.
RISC DATA ADDRESS
RISC DATA ADDRESS
U BUS ADDRESS
U BUS ADDRESS
Note: The worst-case command execution latency is 120 clocks and the typical
command execution latency is approximately 40 clocks.
Figure 16-4. Dual-Port RAM Block Diagram
Freescale Semiconductor, Inc.
For More Information On This Product,
SELECTORS
SELECTORS
ADDRESS
ADDRESS
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
PARAMETER RAM
DUAL-PORT RAM
2,048 BYTES
1,024 BYTES
1,024 BYTES
1,024 BYTES
1,024 BYTES
1,024 BYTES
512 BYTES
512 BYTES
Communication Processor Module
SELECTORS
SELECTORS
DATA
DATA
RISC INSTRUCTION
U-BUS DATA
RISC DATA
16-13

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