mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1325

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Index
GCLKx,
GCLKx_50 frequency,
GCLKx_50,
GCLKxC,
general circuit interface
general circuit interface,
general-purpose chip-select machine
general-purpose chip-select machine,
generating
glue logic,
GND,
gotolink DSP protocol table
gotolink dual port RAM protocol table
gotolink MPC823_S16B
gotolink MPC823_S16C
gotolink RISC timer table protocol table
gotolink S16c_cpm
gotolink S16d_cpm
gotolink S16e_cpm
gotolink S16f_cpm
gotolink S16g_cpm
gotolink S16h_cpm
GPCM (definition),
GPL_A0,
GPL_A1,
GPL_A2,
GPL_A3,
GPL_A4,
GPL_A5,
activation and deactivation,
operation,
programming
programming,
configuring,
serial infrared interaction pulses,
IDMA protocol table
SCC parameter table
UART protocol table
HDLC protocol table
appletalk protocol table
async HDLC protocol table
infra-red protocol
transparent protocol table
ethernet protocol table
SMC protocol table
SMC UART protocol table
GCI protocol table
SPI protocol table
transparent protocol table
USB protocol table
I2C protocol table
parallel ports
2-12
example,
normal mode,
SCIT mode,
5-14
2-5
2-5
2-6
2-6
2-6
2-6
5-14
15-5
5-14
16-147
15-27
16-2
16-150
16-149
15-27
16-149
16-2
16-2
16-149
16-2
5-19
16-2
16-2
16-2
16-2
16-422
16-2
16-2
16-2
16-2
16-2
16-2
Freescale Semiconductor, Inc.
16-2
16-2
16-2
For More Information On This Product,
16-2
16-148
MPC823 REFERENCE MANUAL
16-290
16-2
15-27
16-2
Go to: www.freescale.com
GPL_B0,
GPL_B1,
GPL_B2,
GPL_B3,
GPL_B4,
GPL_B5,
GSMR_H,
GSMR_L,
guarded,
H
hard reset configuration word,
hard reset, registers affected,
hash table algorithm,
HDLC (definition),
HDLC bus controller
HDLC bus controller,
HDLC mode
history buffer storage,
history buffer, instructions that fill it,
horizontal sync,
HRESET,
HSYNC,
I
I2ADD,
I2BRG,
I2C controller
I2CER,
I2CMR,
I2COM,
accessing,
delayed RTS mode,
performance,
using the time-slot assigner,
SCCx,
address register (I2ADD),
baud rate generator register (I2BRG),
buffer descriptor ring,
command register (I2COM),
commands,
event register (I2CER),
features,
mask register (I2CMR),
memory map,
mode register (I2MOD),
operation,
parameter RAM memory map,
programming,
receive buffer descriptor,
transmission and reception,
transmit buffer descriptor,
16-453
16-470
16-472
16-471
16-473
16-471
2-12
11-4
2-5
2-5
2-6
2-6
2-6
2-2
2-6
16-167
16-163
16-230
16-454
,
16-454
4-3
16-257
18-4
16-463
16-258
3-5
16-230
16-465
16-331
16-254
6-9
16-259
16-464
16-472
16-473
16-465
16-466
6-24
16-470
16-468
4-10
16-455
16-471
16-260
16-460
6-9
MOTOROLA
16-471