mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 235
mpc823rg
Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MPC823RG.pdf
(1348 pages)
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Memory Management Unit
TWAM—Tablewalk Assist Mode
PPCS—Privilege/Problem State Compare Mode
Bits 7–20—Reserved
These bits are reserved and must be set to 0. Ignored on write and returns a 0 on read.
DTLB_INDX—Data TLB Index
This field acts as a pointer to the data TLB entry to be loaded. It is automatically
decremented at every data translation lookaside buffer update.
Bits 24–31—Reserved
These bits are reserved and must be set to 0. Ignored on write and returns a 0 on read.
11.6.1.3 MMU CURRENT ADDRESS SPACE ID REGISTER. The MMU current address
space ID (M_CASID) register is used to compare the current effective address with the ASID
field in the TLB entry when searching for a matching entry.
Bits 0–27—Reserved
These bits are reserved and must be set to 0. Ignored on a write.
CASID—Current Address Space ID
This field is compared to the ASID field of a TLB entry to qualify a match.
M_CASID
NOTE: — = Undefined.
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
0 = 1K subpage hardware assist.
1 = 4K page hardware assist.
0 = Ignore problem/privilege state during address compare.
1 = Consider problem/privilege state according to MD_RPN[24:27].
16
0
17
1
18
2
Freescale Semiconductor, Inc.
For More Information On This Product,
19
3
20
MPC823 REFERENCE MANUAL
4
Go to: www.freescale.com
RESERVED
21
5
—
R
22
6
RESERVED
23
SPR 793
SPR 793
7
—
R
24
8
25
9
10
26
11
27
12
28
13
29
CASID
R/W
—
MOTOROLA
14
30
15
31
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