mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 838

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Communication Processor Module
• MRBLR—Each serial management controller has one maximum receive buffer length
• RBPTR—The receiver buffer descriptor pointer for each SMCx channel points to the
• TBPTR—The transmitter buffer descriptor pointer for each SMCx channel points to the
AT—Address Type 1–3
These bits contain the function code value used during this SDMA channel memory
access. The AT0 pin is driven with a 1 to identify this SDMA channel access as a DMA
type.
register that defines the length of the receive buffer. The MRBLR defines the maximum
number of bytes that the MPC823 writes to a receive buffer on a serial management
controller before it moves on to the next buffer. The MPC823 can write fewer bytes to
the buffer than MRBLR if a condition, such as an error or end-of-frame occurs, but it
never writes more bytes than the MRBLR value. It follows then, that the buffers you
supply must always be at least as long as the MRBLR. The transmit buffers for a serial
management controller are not affected in any way by the value programmed into the
MRBLR. Each transmit buffer can have a different length. You can choose the number
of bytes to be transmitted by programming the DATA LENGTH field in the TX buffer
descriptor.
next buffer descriptor the receiver transfers data to when it is idle or to the current buffer
descriptor during frame processing. After a reset or when the end of the buffer
descriptor table is reached, the communication processor module initializes this pointer
to the value programmed in the RBASE entry. Although you will not usually need to
write the RBPTR in most applications, you can modify it when the receiver is disabled
or when you are sure no receive buffer is currently being used.
next buffer descriptor the transmitter transfers data from when it is idle or to the current
buffer descriptor during frame transmission. After a reset or when the end of the buffer
descriptor table is reached, the communication processor module initializes this pointer
to the value programmed in the TBASE register. Although you will not usually need to
write TBPTR in most applications, you can modify it when the receiver is disabled or
when you are sure no receive buffer is currently being used.
Note:
management controller is operating. However, if it is modified in a single bus
cycle with one 16-bit move (not two 8-bit bus cycles back-to-back), then a
dynamic change in the receive buffer length can be successfully achieved. This
occurs when the communication processor module transfers control to the next
RX buffer descriptor in the table. Thus, a change to MRBLR does not have an
immediate effect. To guarantee that the change occurs on a particular RX buffer
descriptor, you must only change the MRBLR while the SMCx receiver is
disabled. The value of MRBLR must be greater than zero and it must be even if
the character length of the data is greater than 8 bits.
The MRBLR is not intended to be dynamically changed while a serial
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
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