mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 589

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
16.7.5.4 SERIAL INTERFACE COMMAND REGISTER. The 8-bit serial interface
command register (SICMR) allows you to dynamically program the serial interface RAM.
The contents of this register are only valid in the RAM division mode. For more information
about dynamic programming, refer to Section 16.7.4.4 Serial Interface RAM Dynamic
Changes.
CSRRA—Change Shadow RAM for TDMA Receiver
When set, this bit causes the serial interface receiver to replace the current route with the
shadow RAM. You set this bit and the serial interface clears it.
CSRTA—Change Shadow RAM for TDMA Transmitter
When set, this bit causes the serial interface transmitter to replace the current route with the
shadow RAM. You set this bit and the serial interface clears it.
Bits 2–7—Reserved
These bits are reserved and must be set to 0.
SICMR
RESET
FIELD
ADDR
R/W
BIT
0 = The receiver shadow RAM is not valid. You can write into the shadow RAM to
1 = The receiver shadow RAM is valid. The serial interface exchanges between the
0 = The transmitter shadow RAM is not valid. You can write into the shadow RAM to
1 = The transmitter shadow RAM is valid. The serial interface exchanges between the
program a new routing.
RAMs and take the new receive routing from the receiver shadow RAM. This bit is
cleared as soon as the switch has completed.
program a new routing.
RAMs and take the new transmitter routing from the receiver shadow RAM. This
bit is cleared as soon as the switch has completed.
CSRRA
R/W
0
0
CSRTA
R/W
Freescale Semiconductor, Inc.
1
0
For More Information On This Product,
MPC823 REFERENCE MANUAL
2
Go to: www.freescale.com
(IMMR & 0xFFFF0000) + 0xAE7
3
4
RESERVED
R/W
Communication Processor Module
0
5
6
16-137
7

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