mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 572

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
16.7.4.3 PROGRAMMING THE SERIAL INTERFACE RAM ENTRIES. The programming
of each word within the RAM determines the routing of the serial bits and assertion of strobe
outputs. The RAM programming codes are shown in the following table.
LOOP—Loopback
SWTR—Switch Transmit and Receive
This bit is only valid in the receive route RAM and is ignored in the transmit route RAM. This
bit affects the operation of both the L1RXDA and L1TXDA pins. The SWTR bit is only set in
special situations in which you prefer to receive data from a transmit pin and transmit data
on a receive pin. For instance, consider the situation in which devices A and B are
connected to the same time-division multiplex, each with different time-slots. Normally, there
is no opportunity for stations A and B to communicate with each other directly over the
time-division multiplex since they both receive the same TDM receive data and transmit on
the same TDM transmit signal.
SERIAL INTERFACE RAM ENTRIES
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
0 = Normal mode.
1 = Loopback mode for this time-slot.
LOOP SWTR SSEL1 SSEL2 SSEL3 SSEL4
R/W
16
0
0
1
RX
STATION A
R/W
17
1
0
1
TX
R/W
18
2
0
1
Freescale Semiconductor, Inc.
For More Information On This Product,
R/W
19
3
0
1
Figure 16-48. Using the SWTR Bit
R/W
20
MPC823 REFERENCE MANUAL
4
0
1
RX
STATION B
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R/W
21
5
0
1
(IMMR & 0xFFFF0000) + 0xC00 TO 0xDFF
(IMMR & 0xFFFF0000) + 0xC00 TO 0xDFF
TX
RES
R/W
22
6
0
1
23
RESERVED
7
1
TDM RECEIVE DATA
TDM TRANSMIT DATA
R/W
CSEL
R/W
24
8
0
1
25
9
1
10
26
1
11
27
1
CNT
R/W
0
12
28
1
13
29
1
MOTOROLA
BYT
R/W
14
30
0
1
R/W
LST
15
31
0
1