mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 183

no-image

mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
8.2.2 Writeback
8.2.2.1 WRITEBACK ARBITRATION
mulli r12,r4,3
sub
addic r4,r12,1
The addic instruction is dependent on the mulli result. Since the single-cycle instruction
sub has priority on the writeback bus over the mulli and the mulli writeback is delayed one
clock and causes a bubble in the execute stream.
mulli r12,r4,3
sub
addic r4,r3,1
GCLK1
FETCH
DECODE
READ + EXECUTE
WRITEBACK
FETCH
DECODE
READ + EXECUTE
WRITEBACK
GCLK1
r3,r15,3
r3,r15,3
Figure 8-3. Another Example of a Writeback Arbitration
Figure 8-2. Example of a Writeback Arbitration
MULLI
MULLI
Freescale Semiconductor, Inc.
For More Information On This Product,
MULLI
MULLI
SUB
SUB
MPC823 REFERENCE MANUAL
MULLI
MULLI
Go to: www.freescale.com
SUB
SUB
ADDIC
ADDIC
SUB, MULLI
SUB, MULLI
ADDIC
ADDIC
SUB
SUB
BUBBLE
ADDIC
MULLI
ADD
ADDIC
Instruction Execution Timing
MULLI
ADD
8-5

Related parts for mpc823rg