mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 997

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Freescale Semiconductor, Inc.
LCD Controller
18.1.2.3 SMART PANEL LCD INTERFACE. In a smart panel interface, the whole memory
display buffer resides on the panel, which is directly connected to the system bus. Also, the
CPU accesses the display memory directly, so you do not need a controller.
18.2 THE MPC823 LCD CONTROLLER
The MPC823 LCD controller is initialized by the core, which provides the frame buffer
address, operational modes, and various configuration bits that the LCD controller needs to
operate. After it is enabled, the LCD controller requests the DMA to fetch the frame buffer
data. The frame buffer is always organized in rows and columns. Depending on the interface
you are using, the data is then interpreted for grayness or color and frame format. The data
is then packed according to the model you have chosen. If you are using a split panel
display, you must initialize two buffers—one for each panel display. The LCD controller uses
continuous DMA to feed the display. Figure 18-5 illustrates a typical MPC823 LCD system.
MPC823
SYSTEM
INTERNAL BUS
SYSTEM BUS
CORE
INTERFACE
UNIT
FRAME
BUFFER
IRQ
SYSTEM RAM
LCD
LCD
DMA
CONTROLLER
PANEL
Figure 18-5. The MPC823 LCD System
The MPC823 LCD controller is a module that is separate from the core and communication
processor module. It uses the internal DMA, bus, and system interface unit to access frame
buffer memory. The LCD controller has dedicated registers that provide timing generation
to control the panel. It also has two FIFOs that interface to color RAM, which provides pixel
MPC823 REFERENCE MANUAL
18-5
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