mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 174

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

SRR1—Save/Restore Register 1
MSR—Machine State Register
Some instruction TLB registers are set to the values described in
Section 11 Memory Management Unit. Execution resumes at offset x’01100’ from the
base address indicated by MSR
7.3.7.3.12 Implementation-Specific Instruction TLB Error Interrupt. This type of
interrupt occurs as a result of one of the following conditions:
The following registers are set:
SRR0—Save/Restore Register 0
Set to the effective address of the instruction that caused the interrupt.
SRR1—Save/Restore Register 1
• The effective address cannot be translated. Either the segment or page valid bit of this
• The fetch access violates storage protection.
• The fetch access is to guarded storage and MSR
0–3
4
10
11–15
Other
IP
ME
LE
Other
page is cleared in the translation table.
1
2
3
4
10
11–15
Other
Set to 0.
Set to 1.
Set to 1.
Set to 0.
Loaded from bits 16-31 of the MSR. In the current implementation, Bit 30 of
the SRR1 is never cleared, except by loading a zero value from MSR
No change.
No change.
Bits are copied from the ILE.
Set to 0.
Set to 1 if the translation of an attempted access is not found in the translation
tables. Otherwise, set to 0.
Set to 0.
Set to 1 if the fetch access was to a guarded storage when MSR
bit 4 is set. Otherwise, set to 0.
Set to 1 if the storage access is not permitted by the protection mechanism;
otherwise set to 0. In the first revision when this bit is set, Bits 3 and 10 are
also set, but in future revisions this bit may be set alone.
Set to 1 when Bit 4 is set. Otherwise, set to 0.
Set to 0.
Loaded from bits 16-31 of the MSR. In the current implementation, Bit 30 of
the SRR1 is never cleared, except by loading a zero value from MSR
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
IP
.
Go to: www.freescale.com
IR
=1.
PowerPC Architecture Compliance
IR
= 1 or when
RI
RI
.
.
7-13