mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 549

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
W—Wrap (Final Buffer Descriptor in Table)
I—Interrupt
L—Last
CM—Continuous Mode
0 = This is not the last buffer descriptor in the table.
1 = This is the last buffer descriptor in the table. After the associated buffer has been
0 = No interrupt is generated after this buffer is serviced.
1 = Once this buffer is serviced by the RISC microcontroller, the AD bit in the IDSRx is
0 = This is not the last buffer to be transferred in the buffer chaining mode. The I bit can
1 = This is the last buffer to be transferred in the buffer chaining mode. When the
0 = Buffer chaining mode. The RISC microcontroller clears the V bit after this buffer
1 = Autobuffer mode (continuous mode). The RISC microcontroller does not clear the
used, the RISC microcontroller transfers data from the first buffer descriptor that
IBASE register points to in the table. The number of buffer descriptors in this table
is programmable and determined only by the W bit and overall space constraints
of the dual-port RAM.
set and can cause an interrupt.
be used to generate an interrupt when this buffer is serviced.
transfer count is exhausted, an interrupt is generated, regardless of state of the
I bit.
descriptor is serviced. This mode is used to transfer large amounts of data into
noncontiguous buffer areas. You can initialize buffer descriptors ahead of time, if
you need to. The RISC microcontroller automatically reloads the IDMA registers
from the next buffer descriptor values when the transfer is terminated.
V bit after this buffer descriptor is serviced. This is the only difference between the
behavior of autobuffer mode and buffer chaining mode. The autobuffer mode is
used to transfer multiple groups of data to/from a buffer ring and does not require
reprogramming. The RISC microcontroller automatically reloads the IDMA
registers from the next buffer descriptor values when the transfer is terminated.
Either a single buffer descriptor or multiple buffer descriptors can be used in this
mode to create an infinite loop of repetitive data moves.
Note: The I bit can be used to generate an interrupt in this mode.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
Communication Processor Module
16-97

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