mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 753

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
16.9.21.4.1 Inline Synchronization Pattern. The transparent channel can be
programmed to transmit and receive a synchronization pattern if the SYNL field in the
GSMR_H are not zero. This pattern is defined in the data synchronization register and the
length of the Sync pattern is defined in the SYNL field. If the SYNL field is 00, then the DSR
is not used and an external Sync signal is used instead. See Section 16.9.4 Data
Synchronization Register and Section 16.9.2 The General SCCx Mode Registers for
more information.
DSR–SCC TRANSPARENT (SYNL = 01)
DSR–SCC TRANSPARENT (SYNL = 10)
DSR–SCC TRANSPARENT (SYNL = 11)
NOTE: X = “Don’t Care”.
NOTE: X = “Don’t Care”.
RESET
RESET
RESET
FIELD
ADDR
FIELD
ADDR
FIELD
ADDR
R/W
R/W
R/W
BIT
BIT
BIT
0
0
0
0
0
0
4-BIT SYNC
1
1
1
1
1
1
R/W
2
1
2
1
2
1
Freescale Semiconductor, Inc.
8-BIT SYNC
For More Information On This Product,
3
1
3
1
3
1
R/W
MPC823 REFERENCE MANUAL
4
1
4
1
4
1
Go to: www.freescale.com
5
1
5
1
5
1
(IMMR & 0xFFFF0000) + 0xA2E
(IMMR & 0xFFFF0000) + 0xA2E
(IMMR & 0xFFFF0000) + 0xA2E
6
1
6
1
6
1
16-BIT SYNC
7
0
7
0
7
0
R/W
8
0
8
0
8
0
9
1
9
1
9
1
R/W
Communication Processor Module
X
10
10
10
1
1
1
11
11
11
1
1
1
R/W
X
12
12
12
1
1
1
13
13
13
1
1
1
14
14
14
1
1
1
16-301
15
15
15
0
0
0

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