mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 395

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Figure 15-19 illustrates the timing for TRLX = 0 when an external asynchronous master
accesses SRAM. The TA signal remains asserted with the WEx and OE signals until the AS
signal is negated by the external master.
When an external asynchronous master performs an access to a memory device via the
general-purpose chip-select machine in the memory controller, the CSNT bit in the option
register is configured as “don’t care”.
CLOCK
ADDRESS
AS
TA
CS
WE
OE
DATA
Figure 15-19. Asynchronous External Master, GPCM-Handled
Freescale Semiconductor, Inc.
For More Information On This Product,
Memory Access Timing (TRLX = 0)
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
Memory Controller
15-39

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