mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 299

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

System Interface Unit
12.12 PROGRAMMING THE SYSTEM INTERFACE UNIT
12.12.1 System Configuration and Protection Registers
12.12.1.1 SIU MODULE CONFIGURATION REGISTER. The SIU module configuration
register (SIUMCR) contains bits that configure various features in the system interface unit.
EARB—External Arbitration
If the EARB bit is set, then external arbitration is assumed. If it is cleared, internal arbitration
is performed. For more information, see Section 13.4.6 Arbitration Phase-Related
Signals.
EARP—External Arbitration Request Priority
This field defines the priority of the external master’s arbitration request. This field is valid
when EARB is cleared. 000 is the lowest priority level and 111 the highest. For more
information, refer to Figure 13-20 in Section 13 External Bus Interface.
Bits 4–7, 13, 24, and 28–31—Reserved
These bits are reserved and must be set to 0.
DSHW—Data Show Cycles
This bit selects the show cycle mode to be applied to data cycles. Instruction show cycles
are programmed in the ICTRL register. Refer to Section 20.6.2 Development Port
Registers for more information. This bit is locked by the DLK bit.
SIUMCR
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
0 = Disable show cycles for all internal data cycles.
1 = Show address and data of all internal data cycles.
EARB
OPAR
R/W
R/W
16
0
0
0
PNCS
R/W
17
1
0
EARP
DPC
R/W
R/W
18
2
0
0
Freescale Semiconductor, Inc.
MPRE
For More Information On This Product,
R/W
19
3
0
20
MPC823 REFERENCE MANUAL
4
MLRC
R/W
0
Go to: www.freescale.com
21
5
RESERVED
R/W
0
AEME
R/W
22
6
0
(IMMR & 0xFFFF0000)
(IMMR & 0xFFFF0000) + 0x000
SEME
R/W
23
7
0
DSHW
R/W
RES
R/W
24
8
0
0
+
0x002
GB5E
R/W
25
9
0
DBGC
R/W
0
B2DD
R/W
10
26
0
B3DD
R/W
11
27
0
DBPC
R/W
0
12
28
RES
R/W
13
29
RESERVED
0
R/W
MOTOROLA
0
FRC
R/W
14
30
0
DLK
R/W
15
31
0