mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 656

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
16.9.15.6 SCCx UART COMMANDS. You can program the CPM command register
(CPCR) with the following commands to transmit data.
You can program the CPCR with the following commands to receive data.
• STOP TRANSMIT—After the hardware or software is reset and a channel is enabled
• GRACEFUL STOP TRANSMIT—This command is used to stop transmitting smoothly,
• RESTART TRANSMIT—This command enables characters to be transmitted on the
• INIT TX PARAMETERS—This command initializes all transmit parameters in the serial
• ENTER HUNT MODE—After the hardware or software is reset and a channel is
in the PSMR–SCC UART register, the channel is in transmit enable mode and starts
polling the first buffer descriptor in the table every eight transmit clocks. This command
disables the transmission of characters on the transmit channel and if it is received by
the SCCx UART controller while a message is transmitting, the message is aborted.
The SCCx UART controller finishes transmitting data that is already transferred to its
FIFO and then stops. As shown in Section 16.9.7 SCCx Parameter RAM Memory
Map, the TBPTR is not incremented. The UART transmitter transmits a programmable
number of break sequences and starts transmitting idles. The number of break
sequences (which can be zero) must be written to the BRKCR before this command is
given to the SCCx UART controller.
rather than abruptly. It is similar to the way the STOP TRANSMIT command finishes. It
stops after the current buffer has completed transmission or immediately if there is no
buffer being transmitted. The GRA bit in the SCCE–UART register is set once this
transmission stops. Then the UART transmit parameters, including the buffer
descriptors, can be modified. The TBPTR points to the next TX buffer descriptor in the
table. Transmission begins once the R bit of the next buffer descriptor is set and the
RESTART TRANSMIT command is issued.
transmit channel. The SCCx UART controller expects this command after it disables the
channel in its PSMR–SCC UART register, after a STOP TRANSMIT command, after a
GRACEFUL STOP TRANSMIT command, or after a transmitter error. The SCCx in
UART mode resumes transmission from the current TBPTR in the channel’s TX buffer
descriptor table.
channel’s parameter RAM to their reset state and must only be issued when the
transmitter is disabled. Notice that the INIT TX AND RX PARAMS command can be
used to reset both the transmit and receive parameters.
enabled in the PSMR–SCC UART register (described in Section 16.9.15.15 SCCx
UART Mode Register), the channel is in receive enable mode and uses the first buffer
descriptor in the table. This command forces the SCCx UART controller to close the
current RX buffer descriptor if it is being used and enter hunt mode. The SCCx UART
controller continues receiving the next buffer descriptor if a message is in progress. In
the multidrop hunt mode, the SCCx UART controller continually scans the input
datastream for the address character. When it is not in multidrop mode, it waits for the
idle sequence (one character of idle) and does not lose any data that was in the receive
FIFO when this command was executed.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
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