mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 996

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
LCD Controller
18.1.2.1 PASSIVE LCD INTERFACE. A passive LCD panel interface uses X and Y shift
registers to operate. The X shift register is used to display a column and the Y shift register
is used to display a row. The LCD controller fills the shift register, provides framing, and
reverses the display polarity from frame-to-frame or line-to-line.
A passive LCD interface consists of several parallel data bits that are shifted into the X shift
register by the shift clock. After the shift register is full, a latch signal transfers the pixels from
the shift register to driver latches and moves the Y pointer down one line. At this point, the
shift operation continues to the next line and after all the lines are scanned, the frame signal
moves the Y pointer to the beginning of the frame. The LCD controller also accesses the
frame buffer. The panel can be single- or dual-scan and the dual-scan function is
accomplished by splitting the Y dimension. For single-scan panels, the LCD controller only
has one buffer. For dual-scan panels, the LCD controller must have one upper and one
lower frame buffer. In most LCD panels, you need control to kill any DC biases that build up
during normal operation. A signal that inverts the polarity of the voltages is presented to the
LCD panel. Usually, this signal toggles every few frames (1–20).
18.1.2.2 ACTIVE LCD INTERFACE. An active LCD panel interface is referred to as a thin
film transistor (TFT) interface. It provides a high-performance LCD panel that looks more like
a digital RGB or monochrome video signal that has several data bits in parallel. The shift
clock is also present. Latch and frame signals are called horizontal sync and vertical sync
and have special timing. There is also a special signal called output enable that
blanks/enables data, but does not affect the clock. For color displays, the MPC823 supports
a 12-bit (four bits per basic color) data bus. For example, an 8-bit pixel data fetched from the
frame buffer is passed through a 256 x 12 memory that selects one out of 256 colors.
FRAME
D[0:x]
SHIFT
LOAD
x = [0, 3, 7]
PASSIVE SINGLE-SCAN
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 18-4. Active (TFT) Interface
PANEL
R[0:x]
x = [2, 3, 4]
VSYNC
G[0:x]
B[0:x]
CLK
HSYNC
Figure 18-3. Passive Interfaces
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
ACTIVE (TFT) PANEL
UD[0:x]
FRAME
LD[0:x]
SHIFT
LOAD
y = [1, 3]
PASSIVE DUAL-SCAN
PANEL
MOTOROLA

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