mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 310

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
External Bus Interface
13.3 BUS SIGNAL DESCRIPTIONS
The following table decribes each bus interface signal. More detailed descriptions can be
found in subsequent sections of this manual.
ADDRESS AND TRANSFER ATTRIBUTES
MNEMONIC
TSIZ[0:1]
RD/WR
BURST
AT[0:3]
A[6:31]
RSV
PTR
Freescale Semiconductor, Inc.
PINS
26
For More Information On This Product,
1
1
2
3
1
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Table 13-1. Bus Interface Signals
MPC823 REFERENCE MANUAL
ACTIVE
High
High
High
High
Low
Low
Low
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I/O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
Address Bus—Driven by the MPC823 when it owns
the external bus. It specifies the physical address of
the bus transaction. These signals can change during
a transaction when controlled by the memory
controller.
Sampled by the MPC823 when an external device
initiates a transaction and the memory controller was
configured to handle external master accesses.
Read/Write —Driven by the MPC823 along with the
address when it owns the external bus. Driven high
indicates that a read access is in progress and driven
low indicates that a write access is in progress.
Sampled by the MPC823 when an external device
initiates a transaction and the memory controller was
configured to handle external master accesses.
Burst Transfer—Driven by the MPC823 along with
the address when it “owns” the external bus. Driven
low indicates that a burst transfer is in progress and
driven high indicates that the current transfer is not a
burst.
Sampled by the MPC823 when an external device
initiates a transaction and the memory controller was
configured to handle external master accesses.
Transfer Size —Driven by the MPC823 along with the
address when it owns the external bus. It specifies the
data transfer size for the transaction.
Sampled by the MPC823 when an external device
initiates a transaction and the memory controller was
configured to handle external master accesses.
Address Type —Driven by the MPC823 along with
the address when it owns the external bus. It provides
additional information about the address on the
current transaction.
Used only for testing purposes.
Reservation Transfer —Driven by the MPC823 along
with the address when it owns the external bus. It
provides additional information about the address on
the current transaction.
Used only for testing purposes.
Program Trace—Driven by the MPC823 along with
the address when it owns the external bus. It provides
additional information about the address on the
current transaction.
Used only for testing purposes.
DESCRIPTION
MOTOROLA

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