mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 530

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Communication Processor Module
GM1—Gate Mode for Pin 1
This bit is only valid if the gate function is enabled in timer 1 or 2.
16.4.2.3 TIMER MODE REGISTERS. The 16-bit, memory-mapped, read/write timer mode
registers (TMR1–TMR4) are identical and cleared by reset. To avoid erratic behavior, the
TGCR must be initialized before the TMRx register. The only exception is that the RST bit
in the TGCR can be modified at any time.
PS—Prescaler Value
The prescaler is programmed to divide the clock input by a value between 1 and 256. A
00000000 value divides the clock by 1 and 11111111 divides it by 256.
CE—Capture Edge and Enable Interrupt
OM—Output Mode (Only Valid for TMR1 and TMR2)
ORI—Output Reference Interrupt Enable
TMR1–TMR4
RESET
FIELD
ADDR
R/W
BIT
0 = Restart gate mode. A falling TGATE1 pin enables and restarts the count and a
1 = Normal gate mode. This mode is the same as 0, except the falling edge of the
00 = Disable interrupt on capture event; capture function is disabled.
01 = Capture on rising TINx edge only and enable interrupt on capture event.
10 = Capture on falling TINx edge only and enable interrupt on capture event.
11 = Capture on any TINx edge and enable interrupt on capture event.
0 = Active-low pulse on TOUT1 or TOUT2 for one timer input clock cycle as defined by
1 = Toggle the TOUTx pin. Changes to TOUTx occur on the falling edge of the system
0 = Disable interrupt for reference that is reached. This does not affect an interrupt on
1 = Enable interrupt when the reference value is reached.
rising edge of TGATE1 disables the count.
TGATE1 pin does not restart the count value in the timer counter.
the ICLK bits. Thus, TOUTx may be low for one general system clock period, one
general system clock/16 period, or one TINx pin clock cycle period. Changes to
TOUTx occur on the falling edge of the system clock.
clock.
the capture function.
0
1
(IMMR & 0xFFFF0000) + 0x990 (TMR1), 0x992 (TMR2), 0x9A0 (TMR3), 0x9A2 (TMR4)
2
Freescale Semiconductor, Inc.
For More Information On This Product,
3
R/W
PS
0
MPC823 REFERENCE MANUAL
4
Go to: www.freescale.com
5
6
7
8
R/W
CE
0
9
R/W
OM
10
0
R/W
ORI
11
0
FRR
R/W
12
0
13
ICLK
R/W
0
MOTOROLA
14
R/W
GE
15
0

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