mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 712

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Communication Processor Module
16.9.17.2.3 Using the Time-Slot Assigner. Sometimes the HDLC bus can be used in a
configuration that has a local HDLC bus and a time-division multiplex transmission line that
is not an HDLC bus. Figure 16-87 illustrates such a case. The local HDLC bus controllers
all communicate over time-slots. However, more than one HDLC bus controller is assigned
to a given time-slot and the HDLC bus protocol controls access during that time-slot.
Figure 16-86. HDLC Bus Time-Slot Assigner Transmission Line Configuration
TX
RX
NOTES:
1. All TX pins of slave devices should be configured to open-drain in the port C parallel I/O port.
2. The TSA in the serial interface of each station is used to configure the preferred time-slot.
3. You can choose the number of stations to share a time-slot. In this example, two are used.
TCLK
TXDx
CTSx
RTSx
DRIVER
LINE
Freescale Semiconductor, Inc.
CONTROLLER
For More Information On This Product,
HDLC BUS
STATIONS SHARE TIME-SLOT N
Figure 16-85. Delayed RTSx Mode
1ST BIT
A
MPC823 REFERENCE MANUAL
CTSx
Go to: www.freescale.com
2ND BIT
CONTROLLER
HDLC BUS
B
CTSx
COLLISION
3RD BIT
LOCAL HDLC BUS
CONTROLLER
HDLC BUS
STATIONS SHARE TIME-SLOT M
C
RTSx ACTIVE FOR ONLY
2 BIT TIMES
CTSx
CONTROLLER
HDLC BUS
D
CTSx
MOTOROLA
R
+5

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