mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 52

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Introduction
• Memory Controller (Eight Banks)
• System Integration Unit
• Video/LCD Controller
Twelve Port Pins with Interrupt Capability
Ten Internal Interrupt Sources
Programmable Highest Priority Request
Contains Complete DRAM Controller
Each Bank Can Be a Chip-Select or RAS to Support a DRAM Bank
A Maximum of 30 Wait States per Memory Bank Can Be Programmed
Glueless Interface to DRAM Single In-Line Memory Modules, Static RAM,
Electrically Programmable Read-Only Memory, Flash EPROM or Synchronous
DRAM
Four CAS lines, Four WE lines, and One OE Line
Boot Chip-Select Available at Reset (Options for 8-, 16-, or 32-Bit Memory)
Variable Block Sizes—32K to 256M
Selectable Write Protection
Hardware Bus Monitor
Software Watchdog Timer
Periodic Interrupt Timer
Low-Power Stop Mode
Clock Synthesizer
On-Chip Bus Arbitration Logic
PowerPC Decrementer
PowerPC Timebase
Real-Time Clock
Reset Controller
Video Controller
— Supports Digital TFT LCD Panels and Analog NTSC/PAL Displays
— Sequential RGB, 4:4:4, and 4:2:2 YC
— CCIR-656 Compatible 8-Bit Interface Port
— Horizontal Sync, Vertical Sync, Field and Blanking Timing Generation with
— Supports Interlace/Noninterlace Scanning Methods
— Programmable Display Active Area
— Programmable Background Color for Inactive Area
— Glueless Interface for Most Digital Video Encoders
— Uses Burst Read DMA Cycles for Maximum Bus Performance
— End-of-Frame Interrupt Generation
Video Formats
Half-Clock Resolution and Programmable Polarity
MPC823 REFERENCE MANUAL
r
C
b
(CCIR 601) Digital Component

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