mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 136

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

The PowerPC Core
In addition to branch folding, the core implements a branch reservation station and static
branch prediction so branches can issue as early as possible. The reservation station allows
a branch instruction to issue even before its condition is ready. With the branch issued and
out of the way, instruction prefetch can continue while the branch operand is being
computed and the condition is evaluated. Static branch prediction determines which
instruction stream is prefetched while the branch is being resolved. When the branch
operand becomes available, it is forwarded to the branch unit and the condition is evaluated.
Branch instructions whose condition is unavailable and forced to issue to the reservation
station are said to be predicted and these branches, which later turn out to have followed
the wrong path, are said to be mispredicted. Branch instructions that issue with source data
already available are unpredicted and those instructions fetched under a predicted branch
are conditionally fetched. The core ignores conditionally prefetched instructions fetched
under a mispredicted branch.
6.3.2 Issuing Instructions
The sequencer tries to issue a sequential instruction on each clock whenever possible.
However, for an instruction to issue, the execution unit must be available and able to discern
whether or not the required source data is available and to ensure that no other instruction
still in execution targets the same destination register. The sequencer informs the execution
units of the existence of the instruction on the instruction bus. The execution units then
decode the instruction, interrogate the register unit (if the operands and targets are free),
and inform the sequencer that it accepts the instruction for execution.
BC With Negative Offset
BC With Positive Offset
BCLR or BCCTR (lk or ctr) Address Ready
BCLR or BCCTR (lk or ctr) Address NOT Ready
B (Unconditional Branch)
BRANCH TYPE
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 6-1. Branch Prediction Policy
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
DEFAULT PREDICTION
Fall Through
Fall Through
Taken
Taken
(Y=0)
Wait
MODIFIED PREDICTION
Fall Through
Taken
Taken
Taken
(Y=1)
Wait
MOTOROLA