mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 573

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

The SWTR option gives station B the opportunity to listen to transmissions from station A
and transmit data to station A. To do this, station B would set the SWTR bit in its receive
route RAM. For this entry, receive data is taken from the L1TXDA pin and data is transmitted
on the L1RXDA pin. If you only want to listen to station A transmissions and not transmit
data on L1RXDA, then you must clear the CSEL field in the corresponding transmit route
RAM entry to prevent transmission on the L1RXDA pin.
It is also possible for station B to transmit data to station A by setting the SWTR bit of the
entry in its receive route RAM. Data is transmitted on the L1RXDA pin rather than the
L1TXDA pin, according to the transmit route RAM. This configuration could, however, cause
collisions with other data on the L1RXDA pin unless care is taken to choose an available
(quiet) time-slot. If you only want to transmit on L1RXDA and not receive data on L1TXDA,
then you must clear the CSEL field in the receive route RAM to prevent reception of data on
L1TXDA.
SSEL1–SSEL4—Strobe Select 1–4
The four strobes—L1ST1, L1ST2, L1ST3, and L1ST4—can be assigned to the receive RAM
and asserted or negated with L1RCLKA. L1ST5, L1ST6, L1ST7, and L1ST8 can be
assigned to the transmit RAM and asserted or negated with L1TCLKA. Each bit corresponds
to the value the strobe must have during this bit/byte group. Multiple strobes can be asserted
simultaneously, if preferred. If a strobe is configured to be asserted in two consecutive serial
interface RAM entries, then it remains continuously asserted while the serial interface RAM
entries are being processed. If a strobe is asserted on the last entry in the table, the strobe
is negated after the last entry finishes processing.
Bit 6—Reserved
This bit is reserved and must be set to 0.
0 = Normal operation of the L1TXDA and L1RXDA pins.
1 = Data is transmitted on the L1RXDA pin and is received from the L1TXDA pin for
the duration of this entry.
Note: If the transmit and receive sections of the TDM do not use a single clock source,
Note: Each strobe is changed with the corresponding RAM clock and is only output if
the SWTR feature can cause erratic results to occur.
the corresponding parallel I/O is configured as a dedicated pin.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
Communication Processor Module
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