mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 926

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
16.14 THE PARALLEL I/O PORTS
The communication processor module supports four general-purpose I/O ports—A, B, C,
and D. Each pin in the I/O ports can be configured as a general-purpose I/O pin or as a
dedicated peripheral interface pin. Port A is shared with the serial communication
controller 2 RXD2 and TXD2 pins, the bank of clocks pins, and some time-division multiplex
pins. Port B is shared with functions like the IDMA, SCC3 (RXD3 and TXD3), SMCx, SPI,
TDM, USB, and I
communication controllers as well as some time-division multiplex pins. However, port C is
unique in that its pins can generate interrupts to the CPM interrupt controller.
You can configure the pins as an input or output, to have a latch for data output, or to be
read or written at any time. You can even configure them to be either general-purpose I/O
or dedicated peripheral pins. Ports A and B have pins that can be configured as open-drain.
These pins drive a zero voltage, but they three-state when driving a high voltage.
11. Initialize the RX buffer descriptor. Assume the RX data buffer is at 0x00001000 in main
12. Initialize the TX buffer descriptors. Assume the TX data buffer 0 is at 0x00004000 in
13. Write 0xffff to the I2CER to clear any previous events.
14. Write 0x17 to the I2CMR to enable all transmit and receive interrupts.
15. Write 0x10000 to the CIMR to allow the I
16. Write 0x01 to the I2MOD register to enable the I
17. Set the STR bit in the I2COM register to begin a master read operation.
memory. Write 0xB000 to RX_BD_Status, 0x0 to RX_BD_Length (optional), and
0x00001000 to RX_BD_Pointer.
main memory. Write 0x9000 to TX_BD_Status 0, 0x2 to TX_BD_Length 0, and
0x00004000 to TX_BD_Pointer 0. Assume the TX data buffer 1 is at 0x00004010 in
main memory. Write 0xBC000 to TX_BD_Status 1, 0x2 to TX_BD_Length 1, and
0x00004010 to TX_BD_Pointer 1.
Write 0x8080 to the CICR to configure interrupt request level 4 and enable CPM
interrupts.
Note: The port pins do not have internal pull-up resistors. Because of the significant
2
C pins. Port C is shared with the RTSx, CTSx, and CDx pins of the serial
flexibility of the communication processor module, many dedicated peripheral
functions are multiplexed onto ports A, B, and C. The functions are grouped in
such a way as to maximize the usefulness of the pins in the greatest number of
MPC823 applications. It may be difficult to fully understand the pin assignment
capability described in this section until you better understand the CPM
peripherals themselves.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
2
C controller to generate a system interrupt.
2
C controller.
MOTOROLA