mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 467

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
When the dual-port RAM is accessed by the core or SDMA channel, the data and address
are passed to and from the U-bus. The microcontroller has access to the entire dual-port
RAM for data fetches and portions of the system RAM for microcode instruction fetches. The
dual-port RAM is used to complete the following tasks. Any two tasks can occur
simultaneously.
Only the content of the parameter and microcode RAM options require the use of fixed
addresses. The buffer descriptors, buffer data, and scratchpad RAM can be located in the
internal system RAM or in any unused parameter RAM. For instance, the area that is
available when a serial channel or sub-block is not being used. When a microcode from
RAM is executed, certain portions of the system RAM are no longer available. There are
three possible configurations for microcode area sizes— first 512-byte block with a 256-byte
extension (RCCR ERAM=01), first 1,024-byte block with 256-byte extension (RCCR
ERAM=10), or first 2,048-byte block with 512-byte extension (RCCR ERAM=11). The
remainder of the first 4,096 bytes are available as system RAM. See Table 16-1 for details.
16.2.6.3.1 Buffer Descriptors. The universal serial bus, serial communication controllers,
serial management controllers, serial peripheral interface, and I
descriptors to control data buffers. The table below shows that their buffer descriptor formats
are all the same. If the IDMA channel is used in buffer chaining or autobuffer mode, it also
uses buffer descriptors. A data length of zero will set the buffer length to 65536 bytes.
16.2.6.3.2 Parameter RAM. The communication processor module maintains a section of
dual-port RAM called the parameter RAM. It contains many parameters for a universal serial
bus, serial communication controller, serial management controller, serial peripheral
interface, I
summarized in Table 16-3. A definition of the parameter RAM is contained in each protocol
subsection that describes the device using a parameter RAM.
OFFSET + 0
OFFSET + 2
OFFSET + 4
OFFSET + 6
• To store the parameters associated with the USB, SCCs, SMCs, SPI, I
• To store the buffer descriptors that describe where data is to be received and
• To store the data from the serial channels. This is optional because data can also be
• To store the RAM microcode for the RISC microcontroller. This feature allows Motorola
• To use as an additional scratchpad RAM space for your program.
in the 1,024-byte parameter RAM.
transmitted.
stored in external memory.
to add protocols in the future.
2
C controller, and IDMA channel operation. The parameter RAM structure is
0
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
HIGH-ORDER DATA BUFFER POINTER
LOW-ORDER DATA BUFFER POINTER
STATUS AND CONTROL
DATA LENGTH
Communication Processor Module
2
C always use buffer
2
C, and IDMAs
16-15
15

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