upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 105
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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CPU System Functions
Figure 3-2
3 1
r0
r1
r2
r3
r4
r5
r6
r7
r8
r9
r1 0
r1 1
r1 2
r1 3
r1 4
r1 5
r1 6
r1 7
r1 8
r1 9
r2 0
r2 1
r2 2
r2 3
r2 4
r2 5
r2 6
r2 7
r2 8
r2 9
r3 0
r3 1
3.2 CPU Register Set
(Zero Register)
(Reserved for Assembler)
(Interrupt Stack Pointer)
(Stack Pointer (SP))
(Global Pointer (GP))
(Text Pointer (TP))
(Element Pointer (EP))
(Link Pointer (LP))
There are two categories of registers:
• General purpose registers
• System registers
All registers are 32-bit registers. An overview is given in the figure below. For
details, refer to V850E1 User’s Manual Architecture.
CPU register set
Some registers are write protected. That means, writing to those registers is
protected by a special sequence of instructions. Refer to “Write Protected
Registers“ on page 124 for more details.
Preliminary User’s Manual U17566EE1V2UM00
0
3 1
EIPC
EIPSW
FEPC
FEPSW
ECR
PSW
CTPC
CTPSW
DBPC
DBPSW
CTBP
PC
(Status Saving Register during interrupt)
(Status Saving Register during interrupt)
(Status Saving Register during NMI)
(Status Saving Register during NMI)
(Interrupt/Execution Source Register)
(Program Status Word)
(Status Saving Register during CALLT execution)
(Status Saving Register during CALLT execution)
(Status Saving Register during exception/debug trap)
(Status Saving Register during exception/debug trap)
(CALLT Base Pointer)
(Program Counter)
0
Chapter 3
105
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