upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 159

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

a)
Clock Generator
Bit position
Only dedicated maskable interrupts have wake-up capability, refer to “Power save modes description” on
page 167.
6
5
4
1
Initial Value
Table 4-19
Address
Access
Bit name
NMIWDT
Note
NMI0
INTM
STP
(2)
PSC - Power save control register
The 8-bit PSC register is used to enter or leave the power save mode specified
in register PSM.
This register can be read/written in 8-bit or 1-bit units.
Writing to this register is protected by a special sequence of instructions.
Please refer to “PRCMD - PSC write protection register” on page 160 for
details.
FFFF F1FE
00
PSC register contents
1.
2.
3.
Preliminary User’s Manual U17566EE1V2UM00
H
R
7
0
. The register is cleared by any reset.
If bits 7, 3, 2, and 0 are not set to 0, proper operation of the controller can
not be guaranteed.
PSC.STP is automatically cleared when the controller is awakened from
power save mode.
Entering a power save mode requires some attention, refer to “Power save
mode activation” on page 179.
Function
Mask for non-maskable interrupt request from WDT:
Mask for non-maskable interrupt request 0:
Mask for maskable interrupt request:
Enter/release power save mode:
0: Permit NMIWDT request during power save mode.
1: Prohibit NMIWDT request during power save mode.
0: Permit external NMI0 request during power save mode
1: Prohibit external NMI0 request during power save mode.
0: Permit maskable interrupt requests during power save mode.
1: Prohibit maskable interrupt requests during power save mode.
0: Power save mode is released.
1: Power save mode is entered.
NMIWDT
R/W
6
H
.
NMI0
R/W
5
INTM
R/W
4
R
3
0
R
2
0
R/W
STP
1
R
0
0
a
Chapter 4
159